DSP, Embedded & Platform Software Services

High speed access Technology (emerging 5G) promises a paradigm change for multiple markets like Automotive, Telecom, IOT, Healthcare.

Embedded Software design services

  • High speed access Technology (including emerging 5G) promises a paradigm change for multiple markets like Automotive, Telecom, IOT, Healthcare.
  • Virtualization and Containerization of functions is enabling faster development & deployment these technologies
  • This calls for  some functions earlier implemented in Hardware to now have alternate Software Implementations
  • This in-turn drives a need for strong Embedded, DSP and RTOS Platform capabilities with domain exposure
  • LeadSoC is equipped to address all your DSP, embedded and Platform SW Design Requirements
  • Our in-house Embedded and DSP Labs, powered by rich open-source tool chain enabled sandboxes, enable our engineers to play & learn.

Embedded & Platform software services

Embedded & Platform SW capabilities

L1 Layer experience includes
  • PHY layer 3G, UMTS WCDMA, 2.5G
  • Debugging PHY L1 blocks (FFT, modulator) on BTS & MS. Fix bugs and crashes.
    L2 Layer experience includes
  • Porting MAC/Transport layer. Handled BCH/PDCCH, Control & Data channels framing, memory optimization
  • Bring up & verification of GiGe interface
  • HDLC encapsulation, EFM, Packet Classification engine
  • Intel FlexRAN / DPDK
    L3 Layer experience includes
  • MPLS, OSPF, RIP, BGP
  • IPv4, IP VPN tunneling related development & sustenance
  • Strong knowledge & expertise of
  • Digital signal processing , Digital communications concepts
  • Fixed & Floating-point precision DSP software Design
  • MIPS & Memory optimized DSP implementation
  • Multicore, Multithreaded environments
  • Application specific accelerators (FFT, Viterbi decoding)
  • DSP/BIOS , SmartDSPOS, FreeRTOS
  • High Speed Interfaces to FPGA
  • Serial Interfaces to ADCs
  • C/C++ , Python programming
  • Process-monitor for Femto Cell gateway to address process reinitialization & recovery
  • Tool for monitoring memory leaks in in Realtime
  • Runtime Utility to collect reboot reasons to enable analysis & fixing of crashes
  • Runtime utility to audit execution time of API’s, priority-based design fixes to optimize the execution time
  • Kernel module API for Media gateway product (SOC). It provides a high-level programming interface to features supported by voice processor.
  • API is designed to work on multiple operating systems (mainly VxWorks & Linux). It has OS abstraction and Hardware abstraction layers
  • API works in two modes External host mode, host processor is outside voice processor Internal host mode, OS & API runs in one of the Network processors
  • API is designed to run in blocking , non-blocking & pseudo non-blocking modes
  • API runs in multi-threaded environment; resource protection using semaphore
  • API enables configuration of SOC, statistics related to SOC runtime usage, has utilities to support debugging in case of runtime malfunction
  • Boot ROM code design & optimization
  • Support for various boot modes ; Secure boot support
  • Board bring-up & Linux bring-up for Multimedia gateway, Femto cell, Mobile devices & handhelds
  • BareMetal & Linux drivers for low level interfaces
  • Diagnostics framework for BNG router
  • Manufacturing diagnostics support for increasing factory yield, Field escape analysis ( FEA )
  • Post Silicon verification framework development & testing for ARM M0 and M4 Micro controller-based board
  • BSP, Drivers & Diagnostics

    Design in
    Kernel space

    Performance Optimization

    Feature Design & Sustenance

    L1 Layer experience includes

    L2 Layer experience includes

    L3 Layer experience includes

    Design tools

    SDLC activities

    Software development case studies

    2G Stack Migration

    Type of client

    Telco OEM

    Requirement

    Porting 2G from DSP based SoC to the GPP based O-RAN framework

    Standards

    3GPP 45 series for GSM/EDGE

    Solution

    This involves design work in
    -Signal Processing :  Adaptive filters & Multirate processing
    -PHY Layer : UL & DL signal chain, Digital modulation techniques, Forward error correction (FEC) – Convolutional encoding & Viterbi decoding;  Target specific optimization
    -Migrating from FreeRTOS (on embedded DSP) to RT Linux (on GPPs),
    -System software design involved work in Multithreading, Multicore design, IPC, Resource management, Logging & Error handling

    Verification

    -Design of unit test framework, Integration testing
    -System testing using Python based Automation framework

    VoIP Platform design

    Type of client

    Telco OEM

    Requirement

    SoC that enables transport of Voice over IP network

    Standards

    Speech codecs – G.729AB, G.723.1, 3GPP 26 series, GSM AMR NB & WB speech codec, G.168: Echo Cancellers, RFC 2833 – RTP / RTCP

    Solution

    This involves design work in

    -Signal processing algorithms & techniques related to VoIP features i.e., Speech codecs, Line echo cancellation, Tone generation and detection, discontinuous transmission (DTX), Voice activity detection (VAD)
    -Implementation of the VoIP features on the target DSPs in resource (Cycles & Memory) constrained environments. This involved writing core modules in assembly language.
    -Optimized implementation of DSP successfully deployed in the field to support 1000+ channels of g.711 codec.

    Verification

    -Design of unit test framework, Integration testing
    – Field trials, debugging & fixing post deployment issues

    DSP Audio

    Type of client

    Media OEM

    Requirement

    Integrating Algorithms for Voice interface for Alexa enabled smart speakers

    Benchmark

    Alexa Quality Tests (AQT) in typical acoustic environments

    Solution

    Design & performance optimization of multi mic noise suppression,  acoustic echo cancellation,   isolated key word recognition algorithms

    L1 Layer experience includes

    • PHY layer 3G, UMTS WCDMA, 2.5G
    • Debugging PHY L1 blocks (FFT, modulator)
      on BTS & MS. Fix bugs and crashes.

    L2 Layer experience includes

    • Porting MAC/Transport layer. Handled
      BCH/PDCCH, Control & Data channels
      framing, memory optimization
    • Debugging PHY L1 blocks (FFT, modulator)
      on BTS & MS. Fix bugs and crashes.
    • Bring up & verification of GiGe interface
    • HDLC encapsulation, EFM, Packet
      Classification engine
    • Intel FlexRAN / DPDK

    L3 Layer experience includes

    • MPLS, OSPF, RIP, BGP
    • IPv4, IP VPN tunneling related development
      & sustenance
    • Boot ROM code design & optimization
    • Support for various boot modes; Secure boot support
    • Board bring-up & Linux bring-up
      for Multimedia gateway, Femto cell, Mobile devices & handhelds
    • BareMetal & Linux drivers for low level interfaces
    • Diagnostics framework for BNG router
    • Manufacturing diagnostics
      support for increasing factory yield, Field escape analysis ( FEA )
    • Post Silicon verification framework development
      & testing for ARM M0 and M4 Micro controller-based board

    L1 Layer experience includes

    L2 Layer experience includes

    L3 Layer experience includes

    Strong knowledge & expertise of

    Satishbabu Kopparthi

    Senior SME – Digital Backend Design

    Satishbabu is Senior SME and has well over a decade of Experience in the Semiconductor Industry. He has extensive experience in various aspects of Digital Backend Design like Physical Design, STA, Synthesis, Formal Verification, Low Power Verification to name a few. He has managed end-to-end Backend Design implementation for ASIC/SOC based platforms. He has been involved in successful tape-out of multiple SOC’s for leading Semicon OEM’s, including several RTL to GDS. He has a passion for mentoring juniors and the is driving force behind the VLSI in-house Lab @ LeadSoc. He holds a Master’s degree ( M Tech ) in VLSI Design from Jawaharlal Nehru Technological University.

    Narasimha Rao

    Senior Architect - DSP & Embedded SW

    Rao is a Senior Architect in DSP based physical layer and multimedia software development. He has over two decades of experience in leading the DSP software development, sustenance activities and customer interaction across wireless communication infrastructure and telecom media gateway products. He brings rich expertise in technologies such as 2G, 3G, 4G LTE apart from multimedia speech/audio systems. He has extensively worked in architecting multiple physical layer designs and optimizing DSP software on state-of-the-art SoCs in multi core environment. He possesses strong background in digital communication theory, signal processing theory and hands on in system debugging aspects. He has proven experience in leading, mentoring and team bring up activities. He was key member of R&D teams at TI, Centillium / Transwitch, Airvana and Lekha Wireless.

    He has a Master’s degree in Electronics and Communications from Mysore University.

    Anand KC

    Senior Architect – Firmware & Embedded SW

    Senior Architect with over two decades of experience in designing & developing products for core & edge communication products, wireline and wireless products. He has extensive experience in HW & Firmware bring up, OSAL design, Performance & Stability analysis on Real time Systems. He also has extensively worked on VoIP, GSM, Routing & Switching, RTL validation, designing, Firmware & DSP , Deep Learning (QCOM) architectures. He is familiar with FPGAs, x86, ARM.  Debugging on complex field issues and crash resolutions is his forte. He has a strong background in design tools. He has a wealth of experience working with Overseas Product Development groups of customers. Notable ones include the groups at Lucent, Alcatel, Ikanos (Freemont), NTT Japan.

     He holds a Master’s degree in Digital Communication from NIT, Calicut.

    Suresh Rao

    VP, Head of Business Development

    A seasoned professional with nearly three decades of experience primarily in Software Design services,  in his current role he focusses on growing the business in VLSI & Embedded SW design services by enabling meaningful engagement with key players in the Telecom, Automotive, IOT & Healthcare.  He has a rich experience of nurturing large Engineering engagements with annual revenues of 80+ M USD spanning a team of 1500+ spread across multiple offshore locations with clients across Americas, Europe & APAC.  These engagements have been a mix of SLA based Managed services and Outcome based projects in Revenue Share. These engagements span Product SW development for CPE, Access, Edge & Core devices across Wireless, Wireline and IOT segments. He has also enabled business development by taking join value proposition with partners to address client projects which may require integration of specific 3rd party IP’s.

    Prior to joining LeadSoc, he was the Senior Delivery Head for Telecom Product Engineering @ Tech Mahindra. Prior to this he has managed Delivery Head roles @ Wipro & Infosys Engineering Services for Telecom & ISV segments. He has good understanding of Telecom & IOT business and the Product Engineering Life Cycle. He believes in creating strong identity for LeadSoc through in-house Labs ( powered by open source )  for VLSI & Embedded Software which will enable to nurture a vibrant talent pool, foster innovation. He also believes that delivering value is key to creating customer loyalty, hence enabling business growth. He holds a bachelor’s degree in Engg ( Telecom ) from Bangalore University.

    M N Kumar

    Chief Strategy Officer / Head of Engineering

    M.N. Kumar, Chief Strategy Officer (CSO) and Head of Engineering, comes with more than 3 decades of experience in multiple successful product startups and MNCs. He has nurtured and built teams to successfully design, deliver and support SoCs and SoC based systems to Tier-1 customers world wide.

    He has worked at Microelectronics Group at ITI, Bangalore and ST Microelectronics, in Agrate, Italy before joining Arcus Technology, possibly India’s first fabless Chip Company, which was acquired by Cypress Semiconductors. In 2000, he left Cypress Semiconductor to co-found vEngines, an early innovator of packet voice processors for use in VoIP etc. vEngines was acquired by Centillium Communications where he lead engineering at for various product lines like Voice Processors, xDSL, EPON, Home Gateway etc.After Centillium merged withTranswitch, he was the head of the Bangalore Technology Center. In 2012, he started and led the India Operations of Aquantia Inc. Aquantia had its IPO in 2017 and was acquired by Marvell Semiconductors in 2019, where he was Sr. Director, before joining LeadSoC.

    He holds a Masters degree in Microelectronics from IIT-Bombay. He is a Sr. Member of IEEE and past chairperson of the Nano Technology Council- IEEE Bangalore.

    Manoj Subramanian

    COO

    Manoj Subramanian, Chief Operating Officer (COO), holds a MBA from TAPMI and an Engineering Degree from MSRIT and comes with more than 2.5 decades of experience as a Senior Human Resources and Sales Professional with generalist background having successfully demonstrated record of success and career progression in a fast paced, high tech work environment in Companies like UB Group, IONIDEA, SATYAM ( Now Tech Mahindra), Hewlett Packard, Centillium, Amba Research, Ikanos and Qualcomm. Built Organizations from scratch to 500+, been part of Engineering Design Teams, worked in start- ups to large multinational corporations, worked and travelled across the globe and managed large successful teams to delivery.

    Capability to work with multiple Business Leaders in the Organization and be a catalyst in delivering Sales & HR solutions that support the specific needs and overall business objectives with bottom line focus. Talent acquisition, talent management and talent retention in a highly competitive market – strategic workforce assessment, resource management and talent planning; employee development strategies and programs; change management (Organisation Development); communication strategies; employee relations, performance management, integration post -merger and transformation exercises. Handled end to end delivery of HR solutions right from Talent Attraction to Talent separation both voluntary and involuntary.

    Looking to Partner with Clients and Help them Partner their Growth – Beyond Boundaries.

    Yaseen Ahmed

    CEO

    Yaseen Ahamed is a young founder and the CEO of LeadSoc Technologies. He has more than a decade of technical experience in physical design and verification of aggressive SoCs in advanced nodes like 14nm, 10nm and 7nm (including some of the most successful mobile chipsets). He is a serial entrepreneur with a vision to provide top notch end-to-end Design services covering VLSI/SoC, Software and Systems. He has a passion for building teams with exceptional talent. He strongly believes in delivering value to client by providing exceptionally innovative design services. He is a diligent planner and works hard on developing customized business strategies for various segments. His holistic approach ensures in creating a mutually beneficial business environment for customers, partners, employees, and all stakeholders.

    He started his career at L&T Technological Services (LTTS) and later worked at few startups. The stint at startups gave him valuable insights in creating & sustaining a viable business venture. He then moved out to start his own venture – LeadSoc in 2017!!   He has a Masters in VLSI Design from Jawaharlal Nehru Technological University.

    Synthesis & QC DFT

    Physical Design

    Analog & Custom Design

    Digital Design & Verification